1. Field of the Invention
The present invention relates to an intermediate frequency input circuit, and more particularly, relates to an intermediate frequency input circuit, which is coupled between output nodes of a frequency mixing circuit and input nodes of an intermediate frequency amplifier circuit, in which an intermediate frequency characteristic of a selector channel and trap characteristics of the intermediate frequency components of the upper and lower adjacent channels can be selected.
2. Description of the Related Art
In some television tuners, an intermediate frequency input circuit is connected between output ends of a frequency mixing circuit and input ends of an intermediate frequency amplifier circuit. The intermediate frequency input circuit allows a selective intermediate frequency signal of a selector channel to pass while rejecting undesired frequency components that may occur near the intermediate frequency. A rejected frequency component may include an intermediate frequency component of an upper adjacent channel and an intermediate frequency component of a lower adjacent channel. Accordingly, undesired frequency components are not received by the intermediate frequency amplifier circuit.
FIG. 4 shows an example of a known intermediate frequency input circuit. As shown, an intermediate frequency input circuit 41 is connected between a frequency mixing circuit 42 and an intermediate frequency amplifier circuit 43. The intermediate frequency input circuit 41 includes a pair of input ends 411 and 412, a pair of output ends 413 and 414, a power supply terminal 415, a first capacitor 44, a first inductor 45 having a center tap, a second capacitor 46, a second inductor 47, a third inductor 48, a third capacitor 49, a fourth capacitor 50, a first resistor 51, a fifth capacitor 52, and a second resistor 53. The frequency mixing circuit 42 includes a pair of output ends 421 and 422 and a pair of output transistors 54 and 55 in a common-base configuration. The intermediate frequency amplifier circuit 43 includes a pair of input ends 431 and 432 and a pair of input transistors 56 and 57 in a common-emitter configuration.
In the intermediate frequency input circuit 41, the first capacitor 44 and the first inductor 45 are connected in parallel between the pair of input ends 411 and 412. The center tap of the first inductor 45 is connected to the power supply terminal 415. A parallel circuit that includes the second capacitor 46 and the second inductor 47 is between one input end 411 and one output end 413. This parallel circuit is connected to the fourth capacitor 50, and the first resistor 51 in series. Between the other input end 412 and the other output end 414 is a second parallel circuit that includes the third inductor 48 and the third capacitor 49. The second parallel circuit is connected to the fifth capacitor 52, and the second resistor 53 in series. In the frequency mixing circuit 42, a collector of the output transistor 54 is connected to one output end 421, and a collector of the output transistor 55 is connected to the other output end 422. In the intermediate frequency amplifier circuit 43, a base of one input transistor 56 is connected to one input end 431, and a base of the other input transistor 57 is connected to the other input end 432. The pair of input ends 411 and 412 of the intermediate frequency input circuit 41 is connected to the pair of output ends 421 and 422 of the frequency mixing circuit 42. The pair of output ends 413 and 414 of the intermediate frequency input circuit 41 is connected to the pair of input ends 431 and 432 of the intermediate frequency amplifier circuit 43.
In the intermediate frequency input circuit 41, the capacitance of the first capacitor 44 and the inductance of the first inductor 45 are selected so that the first capacitor 44 and the first inductor 45 are in resonance with an intermediate frequency of a selector channel. The capacitance of the second capacitor 46 and the inductance of the second inductor 47 are selected so that the second capacitor 46 and the second inductor 47 are in resonance with an intermediate frequency component of an upper adjacent channel, thus forming a first trap circuit for trapping the intermediate frequency component of the upper adjacent channel. The capacitance of the third inductor 48 and the inductance of the third capacitor 49 are selected so that the third inductor 48 and the third capacitor 49 are in resonance with an intermediate frequency component of a lower adjacent channel, thus forming a second trap circuit for trapping the intermediate frequency component of the lower adjacent channel.
The known intermediate frequency input circuit 41 operates as follows. An intermediate frequency signal (hereinafter referred to as an xe2x80x9cIF signalxe2x80x9d) of the selector channel, which includes the unnecessary frequency components, is passed through the pair of output ends 421 and 422 of the frequency mixing circuit 42. The IF signal is received by the intermediate frequency input circuit 41. In the intermediate frequency input circuit 41, the resonance circuit that includes the first capacitor 44 and the first inductor 45 selects an intermediate frequency of the selector channel from the IF signal. The first trap circuit, which includes the second capacitor 46 and the second inductor 47, traps an intermediate frequency component of the upper adjacent channel of the selected intermediate frequency, which is above and adjacent to the selector channel frequency. The second trap circuit, which includes the third inductor 48 and the third capacitor 49, traps an intermediate frequency component of a lower adjacent channel of the selected intermediate frequency, which is below and adjacent to the selector channel frequency. The IF signal that passes through the first trap circuit passes through the fourth capacitor 50, which is a coupling capacitor. The first resistor 51 adjusts the amplitude of the IF signal, and the IF signal is supplied to one output end 413. Simultaneously, the IF signal that passes through the second trap circuit passes through the fifth capacitor 52, which is a coupling capacitor. The second resistor 53 adjusts the level of the IF signal, and the IF signal is passed to the other output end 414. The IF signal obtained at the pair of output ends 413 and 414 is received by the pair of input ends 431 and 432 of the intermediate frequency amplifier circuit 43, and the input IF signal is amplified by the pair of input transistors 56 and 57.
FIG. 5 shows an example of a frequency characteristic of the intermediate frequency input circuit 41 shown in FIG. 4. In FIG. 5, reference symbol P denotes a picture frequency in the intermediate frequency range of the selector channel. Reference symbol S denotes a sound frequency in the intermediate frequency range of the selector channel. Reference symbol T1 denotes the intermediate frequency component of the lower adjacent channel (Nxe2x88x921) of the selector channel (N). Reference symbol T2 denotes the intermediate frequency component of the upper adjacent channel (N+1) of the selector channel (N).
Referring to FIGS. 4 and 5, the known intermediate frequency input circuit 41 has a selective characteristic for the intermediate frequency of the selector channel, and has separate trap characteristics for the intermediate frequency components of the lower adjacent channel and the upper adjacent channel. The difference in amplitude between the peak amplitude of the intermediate frequency of the selector channel and the trap amplitude of the intermediate frequency component of the lower adjacent channel is approximately 11.4 dB in this circuit. The difference in amplitude between the peak amplitude of the intermediate frequency of the selector channel and the trap amplitude of the intermediate frequency component of the upper adjacent channel is approximately 9.0 dB in this circuit. The rejection of the undesired frequency components, i.e., the intermediate frequency component of the lower adjacent channel and the intermediate frequency component of the upper adjacent channel, is not satisfactory. Moreover, a gain for the intermediate frequency of the selector channel is also not satisfactory.
In view of the above, the preferred embodiments of the present invention provide an intermediate frequency input circuit having a high gain for an intermediate frequency of a selector channel and an acceptable trap characteristic for the intermediate frequency components of an upper adjacent channel and a lower adjacent channel.
An intermediate frequency input circuit is provided, which is coupled between output nodes of a frequency mixing circuit and input nodes of an intermediate frequency amplifier circuit. The intermediate frequency input circuit includes a pair of input nodes and a pair of output nodes. A resonance circuit, which is coupled between the pair of input nodes, resonates according to an intermediate frequency of a selector channel. A first series circuit, which is preferably coupled between one of the pair of input nodes and one of the pair of output nodes, includes a first trap circuit programmed or configured to trap an intermediate frequency component of an upper adjacent channel and a first resistor. A second series circuit, which is preferably coupled between the other of the pair of input nodes and the other pair of output nodes, includes a second trap circuit programmed or configured to trap an intermediate frequency component of a lower adjacent channel and a second resistor. A parallel circuit, which is coupled between the pair of output nodes, includes a third resistor and a capacitor.
In one aspect, the parallel circuit, which includes the third resistor and the capacitor, is coupled between the pair of output nodes. Compared to some known characteristics of an intermediate frequency input circuit, a high gain characteristic for the intermediate frequency of the selector channel is obtained. This aspect also obtains acceptable trap characteristics for the intermediate frequency component of the upper adjacent channel and for the intermediate frequency component of the lower adjacent channel.